The semiconductor industry has experienced rapid growth due to continuous improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area.
As transistor sizes decrease, the size of each feature decreases. For example, in FinFET devices, the pitch (e.g., distance) between adjacent fins becomes so small that during implantation of dopant, the angle of implantation is limited by the small pitch between adjacent fins, which may result in non-uniform dopant distribution in the fins of the FinFET device. There is a need in the art for processing methods that could accommodate the small feature sizes in advanced process technologies.